Functions in Makefile

There are 3 related concepts:

1. call function
2. multi-line variables
3. conditionals

The refactored result could look like this:

ifeq ($(UNAME),Linux)    compile = $(MAKE) FC=$(1) FFLAGS=$(2) PETSC_FFLAGS=$(3) \                      TARGET=$@ LEXT="$(1)_$(UNAME)" -e systelse    define compile =        echo $(err_arch)        exit 1    endefendif        debug_ifort:        $(call compile,ifort,$(difort),"...")

That one \ that is left is to continue the $(MAKE) line for the shell.No multi-line variable is necessary here, because it is just one line of shell code.Multi-line variables are only used in the else block.

If you don't need parameters you can use := assignment and just expand the method with $(compile) (see canned recipes)

Note: Using make prior to version 3.82, the = was not recognized at the end of the define statement for me. I fixed this by using define compile instead.

You're looking for the call function.

compile =                                                 \        if [ $(UNAME) = $(1) ]; then                      \          $(MAKE) FC=$(2) FFLAGS=$(3) PETSC_FFLAGS="..."  \                  TARGET=$@ LEXT="$(4)_$(UNAME)" -e syst; \        else                                              \          echo $(err_arch);                               \          exit 1;                                         \        fidebug_ifort_Linux:        $(call compile,Linux,ifort,$(difort),ifort)

If you can restructure your Makefile a bit, though, you should see if you can use make's conditionals instead of sh's.