How to write a Makefile to compile a simple C program

This is your simple make file for hello program.

CC      = gccCFLAGS  = -gRM      = rm -fdefault: allall: HelloHello: Hello.c    $(CC) $(CFLAGS) -o Hello Hello.cclean veryclean:    $(RM) Hello

Suppose you have two makefiles in one directory named makefile.m1 and makefile.m2 and if you want build both make file then please use following commands

make -f makefile.m1make -f makefile.m2

or use single Makefile that contains:

m1:  make -f makefile.m1m2:  make -f makefile.m2

and use make m1 or make m2

Now lets clear your doubt about name of make file must not require Makefile

You can name makefile whatever you want. suppose i would like to give name myfirstmakefile.mk. To use it later you need to tell make what makefile you want. Use -f option for this:

make -f myfirstmakefile.mk

And again extantion .mk is also not manadatory you can use whatever you want but never forgot to use -f option.

so may this help make sense to you.

A makefile is a recipe for the make utility how to create some file (called a target) from some other files (called dependencies) using a set of commands run by the shell. A makefile typically looks like this:

target: dependency [...]        command1        command2

Try running man make for details.

Now for your task, really there is no need for a Makefile, since make has built-in rules that know how to compile a simple program. All you need to do is place your C source in a file named after the executable name (Hello) and with a .c extension, i.e. Hello.c.

Then a simple

$ make Hellocc     Hello.c   -o Hello

does everything. If you want to use gcc instead of cc, you can run

$ rm Hello$ make CC=gcc Hellogcc     Hello.c   -o Hello

If you tell your instructor/teacher/prof that an empty makefile is all you need since you know the built-in rules do the right thing, you'll get some extra credit and maybe your instructor has learnt something new :-) If you are asked for a reference, you could quote the relevant parts of the make manual, or, do it like a pro, quote from the POSIX Standard for the make utility, section Default Rules.

before going for makefile you have to know what's it and why we need it

What is Makefile?

Makefile is a script written in a certain prescribed syntax which helps to build the target output (normally, one or more executables) from source files by compilation and linking. In simple words, makefile will compile your source code in simple & fast way.Why we need Makefile?

=> Large projects can contain multiple source files which are dependent in one another or arranged in hierarchical manner for example, in order to compile file A, you have to first compile B; in order to compile B, you have to first compile C; and so on.

=> Make is a solution to these problems. It can be used to compile whole project in well arranged manner and generate your target according to your make rule(which we will discuss later) by entering single command that is make.

=> An important feature is that when a project is recompiled after a few changes, it will recompile only those files which are changed, and any other files that are dependent on it. This saves a lot of time.

=> For a large project, when a few changes are made to the source, manually recompiling the entire project each time is tedious, error-prone and time-consuming.

Here is nice link for it :How to write first makefile