Makefile syntax: what is $(RM)?

It's a Makefile variable. There're explicit variable (which is defined inside Makefile) or implicit variable (defined by make, can be override by you).

The list of implicit variables can be found by:

make -p

some of the most common variables can be found at: 10.3 Variables Used by Implicit Rules

You can expand variable by $(NAME) or ${NAME}

$(RM) is a reference to a "make" variable (or macro in POSIX lingo). These come in two syntax flavors, with identical semantics: $(NAME) and ${NAME} (and there are one letter macros not needing parentheses, such as $a).

POSIX specifies many variables, errrrr, macros, to have a default:

MAKE=makeAR=arARFLAGS=-rvYACC=yaccYFLAGS=LEX=lexLFLAGS=LDFLAGS=CC=c99CFLAGS=-O 1FC=fort77FFLAGS=-O 1GET=getGFLAGS=SCCSFLAGS=SCCSGETFLAGS=-s

Interestingly, RM isn't one of them.The default value for the RM variable in your make implementation apparently is rm -f (and your make runs in non-POSIX mode by default).

Note that while $(PWD) has the same syntax as a shell command substitution (and ${PWD} the same as a shell parameter), they are completely different things. To answer your question, no, you can't expect $(PWD) as a "make" macro to run the pwd utility or expand to the current working directory. An undefined macro will be expanded to an empty string without "make" even raising an eyebrow.

It's a make file variable. Previously or in your env you have RM="rm -f" syntax depending on the shell or if it's in the make itself, and now you're just executing.

You can run pwd, but to use $(PWD), you need to set PWD="pwd".